Simulation of the Novel Gradually Low-K Dielectric Structure for Crosstalk Reduction in VLSI and Comparison with Low-K Technology

Crosstalk noise and delay uncertainty problem are two major issues in modern VLSI design. In this paper, we have proposed a new dielectric structure for integrated circuits that reduces crosstalk noise and delay uncertainty, considerably. This structure is in contrast to the conventional Cu/Low-K technology. We have extracted the RLC model of new structure and the conventional Cu/Low-K technology employing a field solver tool. With the Hspice Simulator and these models, we have shown that the crosstalk Near End Noise and Far End Noise are reduced 45.2% and 15%, respectively by using the new structure. The proposed structure, called gradually low-K, has very low side-effects in terms of delay and power consumption. Therefore, it is considered that the gradually low-K structure is a relevant choice for overcoming the crosstalk and delay uncertainty problems, especially in global interconnects tier.