DocumentCode
2999444
Title
Room-temperature demonstration of integrated silicon single-electron transistor circuits for current switching and analog pattern matching
Author
Saitoh, Masumi ; Harata, Hidehiro ; Hiramoto, Toshiro
Author_Institution
Inst. of Ind. Sci., Tokyo Univ., Japan
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
187
Lastpage
190
Abstract
This paper reports the first room-temperature (RT) operation of integrated single-electron transistor (SET) circuits. We fabricate silicon single-hole transistors (SHTs) with high controllability and obtain large Coulomb blockade (CB) oscillation with the peak-to-valley current ratio (PVCR) of over 103 at RT. A current switch using two SHTs integrated under a single gate is demonstrated at RT. We propose a novel application of SHTs, an ultra-compact analog pattern matching circuit. Its basic operation is demonstrated at RT using three SHTs fabricated on one chip, whose CB peak positions and currents are properly controlled by hole injection into nanocrystals embedded in the gate oxide of SHTs.
Keywords
Coulomb blockade; silicon; single electron transistors; transistor circuits; Coulomb blockade oscillation; analog pattern matching circuit; current switching; hole injection; integrated silicon single-electron transistor circuit; peak-to-valley current ratio; room-temperature demonstration; silicon single-hole transistors; Controllability; Fabrication; MOSFETs; Nanocrystals; Pattern matching; Silicon; Single electron transistors; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN
0-7803-8684-1
Type
conf
DOI
10.1109/IEDM.2004.1419104
Filename
1419104
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