DocumentCode
3000026
Title
Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels
Author
Haifang Liao ; Wei-Ming Dai, W.
Author_Institution
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
fYear
1995
fDate
5-9 Nov. 1995
Firstpage
704
Lastpage
709
Abstract
This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number of RC elements can be reduced between 50% and 90%. Instead of increasing approximation order for a network with large number of ports which will result in inefficiency at best and ill-conditioned matrices at worst, we partition the original network into several subnetworks, each of which is approximated by lower order model. The reduced circuits are guaranteed to be stable. The experiment results show that the number of circuit elements in a reduced network is O(N) for typical clock networks, where N is the number of external ports. The simulation time can be reduced by two to three orders of magnitude while the response of the reduced circuits is within five percent of that of the original circuits.
Keywords
RC circuits; circuit analysis computing; integrated circuit interconnections; RC circuits; RC interconnect networks; reduced network; scattering parameter macromodels; simulation time; typical clock networks; Circuit simulation; Clocks; Computational modeling; Computer networks; Equivalent circuits; Frequency; Integrated circuit interconnections; Partitioning algorithms; Scattering parameters; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
ISSN
1092-3152
Print_ISBN
0-8186-8200-0
Type
conf
DOI
10.1109/ICCAD.1995.480207
Filename
480207
Link To Document