Title :
A high performance vector quantisation chip
Author :
Yan, M. ; Hu, Y. ; McCanny, J.V.
Author_Institution :
Dept. of Electr. & Electron. Eng., Queen´´s Univ. of Belfast, UK
Abstract :
A demonstrator chip is described for real time speech vector quantisation applications. The chip has been fabricated in a 1.2 micron CMOS technology and contains 38,000 transistors. It occupies a die area of only (4.8 × 4.6) mm2 and can perform over 80 million multiplyaccumulate operations per second. The chip fully demonstrates the benefits which result from using a regular dedicated VLSI architecture
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; digital signal processing chips; parallel architectures; pipeline processing; speech coding; vector quantisation; 1.2 micron; 40 MHz; CMOS; custom chip; dedicated VLSI architecture; demonstrator chip; high performance; inner product array processors; pipelined array architecture; real time speech vector quantisation; vector quantisation chip; CMOS technology; Circuits; Clocks; Computer architecture; Distortion measurement; Pattern matching; Real time systems; Synchronization; Vector quantization; Very large scale integration;
Conference_Titel :
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location :
Veldhoven
Print_ISBN :
0-7803-0996-0
DOI :
10.1109/VLSISP.1993.404491
