DocumentCode :
3000985
Title :
Power optimization of Sequential Circuits by Retiming and Rewiring
Author :
Jeddi, Zahra ; Amini, Esmail
Author_Institution :
Comput. Eng. Dept., Amirkabir Univ. of Technol., Tehran
Volume :
2
fYear :
2006
fDate :
6-9 Aug. 2006
Firstpage :
585
Lastpage :
589
Abstract :
In this paper, a new method for decreasing dynamic power consumption of sequential circuits is presented. To achieve this, the hybrid of rewiring and retiming methods is used. Rewiring is utilized to reduce the total transitions within the combinational parts of the sequential circuit. Retiming is used to change the topology of combinational parts when rewiring can not optimize those parts, in order to create new chance for optimization of those blocks. As of benchmarking three of ISCAS89 circuits were employed. Experimental results have shown that this scheme will decrease the switching activity of implemented circuits from 14% to 29.9%.
Keywords :
VLSI; combinational circuits; integrated circuit design; logic design; low-power electronics; network topology; sequential circuits; ISCAS89 circuits; VLSI circuits design; combinational circuit; combinational parts topology; power optimization; retiming methods; rewiring methods; sequential circuits; switching activity; total transitions reduction; Combinational circuits; Design optimization; Energy consumption; Heat sinks; Power dissipation; Registers; Sequential circuits; Switching circuits; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location :
San Juan
ISSN :
1548-3746
Print_ISBN :
1-4244-0172-0
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2006.381798
Filename :
4267422
Link To Document :
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