Title :
Functionally-aware Partitioning of Discrete Signal Transforms for Distributed Hardware Architectures
Author :
Arce-Nazario, Rafael A. ; Jimenez, Manuel ; Rodríguez, Domingo
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Puerto Rico at Mayaguez, Mayaguez
Abstract :
A high-level partitioning methodology is introduced, which uses formulation-level discrete signal transform properties to provide improved results for their partitioning to distributed hardware architectures. We discuss how discrete signal transform characteristics were taken into account to focus design exploration during partitioning. Additionally, a description is given of the experiments conducted to determine the effect of formulation-level properties on solution quality. Perceived patterns in experimental results were used to generate ´partition- friendly´ formulations for distributed hardware architectures.
Keywords :
discrete transforms; field programmable gate arrays; high level synthesis; logic partitioning; discrete signal transform characteristics; distributed hardware architectures; formulation-level discrete signal transform; functionally-aware partitioning methodology; high-level partitioning methodology; multiFPGA boards; Computer architecture; Discrete transforms; Distributed computing; Electric breakdown; Flexible printed circuits; Hardware; Optimization methods; Partitioning algorithms; Signal design; Spirals;
Conference_Titel :
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location :
San Juan
Print_ISBN :
1-4244-0172-0
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2006.381799