Reference-Based Clock Distribution Architectures

This paper examines the use of clock distribution architectures employing a reference-based skew compensation technique. For each clock domain, a bi-directional clock line is daisy-chained using specially designed switches at each tap in the distribution. Daisy-chaining the clock decreases the clock load by eliminating the redundant paths used to equalize delays in traditional H-tree distributions. Clock skew is accounted for by actively synchronizing each local clock to a position directly between forward and reverse-moving reference clocks. This reference-based clocking strategy achieves a set of skew-tolerant clocks at each tap in a daisy-chain. The design provides simple-to-layout and scalable multipoint skew compensation useful for large designs. The implementation of a reference-based clocking chain is outlined, followed by the description of single clock and multi-clock architectures using this design strategy.