A high-speed residue-to-binary converter and a scheme for its VLSI implementation

Author

Wang, Wei ; Swamy, M.N.S. ; Ahmad, M.O. ; Wang, Yuke

Author_Institution

Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada

Volume

6

fYear

1999

fDate

36342

Firstpage

330

Abstract

In this paper, a high-speed residue-to-binary converter for the recently introduced moduli set (2^k, 2^k-1, 2^k-1-1) is proposed. Compared to the previous converter based on this moduli set, the proposed one is 40% faster; also, the time-complexity product is improved by 20%. Following the VLSI design flow established by the Canadian Microelectronics Corporation, the proposed converter is implemented in 0.5-micron CMOS technology. Based on this moduli set, layouts of the 8-bit, 16-bit, 32-bit and 64-bit residue-to-binary converters which can be used in further RNS system designs, are generated and simulation results obtained

Keywords

CMOS digital integrated circuits; VLSI; high-speed integrated circuits; residue number systems; 0.5 micron; 16 bit; 32 bit; 64 bit; 8 bit; CMOS technology; VLSI design; circuit simulation; high-speed residue-to-binary converter; moduli set; residue number system; time-complexity product; CMOS technology; Cathode ray tubes; Digital filters; Information management; Microelectronics; Signal processing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5471-0

Type

conf

DOI

10.1109/ISCAS.1999.780162

Filename

780162