Title :
Creating hard problem instances in logic synthesis using exact minimization
Author :
Günther, Wolfgang ; Drechsler, Rolf
Author_Institution :
Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
Abstract :
To evaluate synthesis algorithms, usually benchmark circuits are used. Since for these circuits no exact synthesis results are known, we propose the use of exact minimization to generate hard problem instances. By this we evaluate a standard synthesis tool on different classes of circuits
Keywords :
logic design; minimisation of switching nets; benchmark circuit; exact minimization algorithm; hard problem; logic synthesis; Adders; Circuit synthesis; Computer science; Cost function; Data structures; Libraries; Logic design; Minimization methods; Process design; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.780188
