DocumentCode
3002313
Title
High density and low power design of MRAM
Author
Hung, C.C. ; Kao, M.J. ; Chen, Y.S. ; Wang, Y.H. ; Hsu, H.H. ; Chen, C.M. ; Lee, Y.J. ; Chen, W.C. ; Lee, J.Y. ; Chen, W.S. ; Shen, K.H. ; Wei, J.H. ; Wang, L.C. ; Chen, K.L. ; Tsai, M.J. ; Lin, W.C. ; Chao, S. ; Tang, D.D.
Author_Institution
Electron. Res. & Service Organ., ITRI, Hsinchu, Taiwan
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
575
Lastpage
578
Abstract
MRAM structures based on 1T2UMTJ cell and PWWL architecture are proposed to shrink the bit size with a potential down to 6 F2 by a so-called ExtVia process and reduce the writing current by a factor of two, combined with the nature of non-volatility and high speed, making the MRAM suitable for universal memory applications.
Keywords
integrated circuit design; low-power electronics; magnetic tunnelling; magnetoresistive devices; random-access storage; 1T2UMTJ cell; ExtVia process; PWWL architecture; high density MRAM; high speed memory; low power MRAM; nonvolatile memory; universal memory applications; writing current reduction; Chaos; Coercive force; Electrodes; Electronic mail; Manufacturing processes; Micromagnetics; Photonics; Random access memory; Semiconductor device manufacture; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN
0-7803-8684-1
Type
conf
DOI
10.1109/IEDM.2004.1419225
Filename
1419225
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