Keynote address 1: “built-in-self-test and digital self calibration of RFICs”

To achieve the highest performance/price ratios of handheld wireless devices, the current trends in wireless chip set development call for multi-standard nanometer CMOS radios integrated on a single chip. This represents a grand challenge to the “yield” of such chip sets and typically requires several silicon spins which will increase the NRE development costs and may result in significant product delays and in missing important market windows. To meet this challenge, we present design techniques for built-in self-test (BIST) and digital self calibration of CMOS radio systems and demonstrate the validity of these techniques in the design of WiMAX/WLAN CMOS radio front ends.