DocumentCode
3002542
Title
Conditions for the design of circuits with concurrent error detection properties
Author
Bolchini, Cristiana ; Salice, Fabio ; Sciuto, Donatella
Author_Institution
Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
Volume
4
fYear
1997
fDate
9-12 Jun 1997
Firstpage
2741
Abstract
The design of self-checking circuits through output encoding finds a bottleneck in the realization of the network so that each fault produces only detectable errors. New conditions are defined for identifying the set of gates that, if faulty, cause undetectable errors, taking into account AUED codes (Berger and m-out-of-n) and the Parity code, for a reduction of the re-design of the circuit and, consequently, of costs
Keywords
built-in self test; error detection codes; network synthesis; AUED code; Berger code; concurrent error detection; gate set; m-out-of-n code; network fault; output encoding; parity code; self-checking circuit design; Animation; Bidirectional control; Circuit faults; Costs; Electrical fault detection; Encoding; Fault detection; Fault diagnosis; Network synthesis; Programmable logic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.612892
Filename
612892
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