A combined packet and circuit switching routing algorithm for networks-on-chips

Author

Sabry, Mohamed M. ; Bedor, Hassan Shehata ; El-Kharashi, M. Watheq ; Salem, Ashraf

Author_Institution

Ain Shams Univ., Cairo

fYear

2008

fDate

20-22 Dec. 2008

Firstpage

28

Lastpage

32

Abstract

A new dynamic switching theme is proposed for networks-on-chips to provide adaptive routing to guarantee a lower packet latency at different injection rates. Router architecture and packet format are developed to support our routing algorithm. Modeling of the router and the routing algorithm was done using SystemC and applied on 2-D mesh network. A new combined switching mode is proposed that dynamically at run time switches any path from a shared to a dedicated path. Simulation of the combined switching mode against the packet switching mode is performed. Results show that the packet latency is lowered by 11% compared to packet switching.

Keywords

circuit switching; network routing; network-on-chip; 2D mesh network; adaptive routing; combined packet-circuit switching routing algorithm; combined switching mode; networks-on-chips; packet latency; packet switching; packet switching mode; Adaptive systems; Delay; Graphics; Integrated circuit interconnections; Network-on-a-chip; Packet switching; Routing; Switching circuits; Telecommunication traffic; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Test Workshop, 2008. IDT 2008. 3rd International

Conference_Location

Monastir

Print_ISBN

978-1-4244-3479-4

Electronic_ISBN

978-1-4244-3478-7

Type

conf

DOI

10.1109/IDT.2008.4802459

Filename

4802459