Title :
SRAM-FPGA implementation of masked S-Box based DPA countermeasure for AES
Author :
Kamoun, Najeh ; Bossuet, Lilian ; Ghazel, Adel
Author_Institution :
CIRTA´´COM Lab., SUP´´COM, Ariana
Abstract :
This paper presents FPGA implementation and overhead evaluation for an algorithmic DPA countermeasure for advanced encryption standard AES. To reduce implementation overhead the masked compact S-Box, proposed by Canright, was chosen to implement a DPA countermeasure on an SRAM FPGA. Obtained results showed that secured AES IP leads to slices number increase by 60,1% and a frequency decrease by 4%.
Keywords :
SRAM chips; cryptography; field programmable gate arrays; DPA countermeasure; FPGA; SRAM; advanced encryption standard; differential power attack; masked S-Box; Communications technology; Cryptography; Electronic mail; Field programmable gate arrays; Hardware; Information security; Matrices; NIST; Random access memory; Timing; AES; DPA; Masked S-Box; SRAM FPGA;
Conference_Titel :
Design and Test Workshop, 2008. IDT 2008. 3rd International
Conference_Location :
Monastir
Print_ISBN :
978-1-4244-3479-4
Electronic_ISBN :
978-1-4244-3478-7
DOI :
10.1109/IDT.2008.4802469
