Nonlinear compensation for finite word length effects of an LMS echo canceller algorithm suitable for VLSI implementation

Author

Song, Moon S. ; Yang, Paul P N ; Shenoi, Kishan

Author_Institution

DSC Granger Assoc. Inc., Santa Clara, CA, USA

fYear

1988

fDate

11-14 Apr 1988

Firstpage

1487

Abstract

When an algorithm for echo cancellation is to be implemented in VLSI, it is essential to minimize the word length of the coefficients for economical reasons. While insufficient word length significantly degrades the performance of the canceller, it is possible to compensate for its effects by using a nonuniform number representation system, i.e. pseudo-floating-point arithmetic. Such an algorithm, using 10 bits, is discussed and its performance is compared with that of ordinary fixed-point algorithms with various number of bits. A multichannel echo-canceller chip has been built using this algorithm. It is used successfully in a T1 echo canceller system

Keywords

VLSI; echo suppression; telephone equipment; LMS echo canceller algorithm; T1 network; VLSI implementation; echo cancellation; finite word length effects; least mean square algorithm; multichannel echo-canceller chip; nonlinear compensation; nonuniform number representation system; pseudo-floating-point arithmetic; telephone equipment; Adaptive filters; Arithmetic; Degradation; Delay; Echo cancellers; Equations; Filtering algorithms; Least squares approximation; Phase change materials; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on

Conference_Location

New York, NY

ISSN

1520-6149

Type

conf

DOI

10.1109/ICASSP.1988.196884

Filename

196884