DocumentCode :
3002945
Title :
SoC integration in deep submicron CMOS
Author :
Rickert, P. ; Haroun, B.
Author_Institution :
Texas Instruments, Inc., Dallas, TX, USA
fYear :
2004
fDate :
13-15 Dec. 2004
Firstpage :
653
Lastpage :
656
Abstract :
System-on-a-chip (SoC) integration involves a complete system level tradeoff analysis that involves the entire bill of materials, and the architectures used for the communication systems being designed. To realize and optimize SoC requires close collaboration from diverse engineering disciplines, including process integration engineers, circuit engineers, and system engineers to determine the best set of tradeoffs. This synergism will result in finding the most cost effective solution and harness the strengths of the ultra deep submicron process, producing new architectures which will result in innovative solutions to SoC products.
Keywords :
CMOS integrated circuits; circuit optimisation; integrated circuit technology; system-on-chip; SoC integration; SoC optimization; circuit engineers; communication systems; complete system level tradeoff analysis; deep submicron CMOS; process integration engineers; system engineers; system-on-a-chip; ultra deep submicron process; Batteries; Bills of materials; Breakdown voltage; CMOS process; Collaboration; Costs; Instruments; MOSFET circuits; System-on-a-chip; Systems engineering and theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN :
0-7803-8684-1
Type :
conf
DOI :
10.1109/IEDM.2004.1419252
Filename :
1419252
Link To Document :
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