DocumentCode
3003120
Title
Hardware implementation of the Smith-Waterman Algorithm using Recursive Variable Expansion
Author
Hasan, Laiq ; Al-Ars, Zaid ; Nawaz, Zubair ; Bertels, Koen
Author_Institution
Comput. Eng. Lab., Delft Univ. of Technol., Delft
fYear
2008
fDate
20-22 Dec. 2008
Firstpage
135
Lastpage
140
Abstract
In this paper we adapted a novel approach for accelerating the Smith-Waterman (S-W) algorithm using Recursive Variable Expansion (RVE), which exposes extra parallelism in the algorithm, as compared to any other technique. The results demonstrate that applying the recursive variable expansion technique speeds up the performance by a factor of 1.36 to 1.41, as compared to traditional acceleration approaches at the cost of using 1.25 to 1.28 times more hardware resources.
Keywords
bioinformatics; field programmable gate arrays; parallel algorithms; FPGA; Smith-Waterman algorithm; bioinformatics; hardware implementation; hardware resources; recursive variable expansion; Acceleration; Concurrent computing; Costs; Equations; Field programmable gate arrays; Hardware; Laboratories; Parallel processing; Sequences; Systolic arrays; FPGA; Recursive Variable Expansion; Sequence Alignment; Smith-Waterman Algorithm; Systolic Array;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Test Workshop, 2008. IDT 2008. 3rd International
Conference_Location
Monastir
Print_ISBN
978-1-4244-3479-4
Electronic_ISBN
978-1-4244-3478-7
Type
conf
DOI
10.1109/IDT.2008.4802483
Filename
4802483
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