DocumentCode
3003137
Title
On-chip transmission line for long global interconnects
Author
Ito, Hiroyuki ; Inoue, Junpei ; Gomi, Shinichiro ; Sugita, Hideyuki ; Okada, Kenichi ; Masu, Kazuya
Author_Institution
Tokyo Inst. of Technol., Yokohama, Japan
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
677
Lastpage
680
Abstract
This paper investigates the feasibility of differential transmission line interconnects. On-chip differential transmission lines achieve higher speed signal transmission and lower power consumption than RC lines at global interconnects. Differential transmission line interconnects are a key technology for breaking through the limitations of delay and power consumption at global interconnects in exchange for an increase in the interconnect layers.
Keywords
integrated circuit interconnections; transmission lines; RC lines; differential transmission line interconnects; global interconnects; interconnect layers; on-chip transmission line; power consumption; speed signal transmission; Attenuation; Coplanar transmission lines; Delay; Distributed parameter circuits; Energy consumption; Frequency; Integrated circuit interconnections; Power transmission lines; Transmission lines; Ultra large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN
0-7803-8684-1
Type
conf
DOI
10.1109/IEDM.2004.1419258
Filename
1419258
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