A cryptographic chip for ISDN and high speed multi-media applications

Author

Daemen, J. ; Claesen, L. ; Genoe, M. ; Peeters, G. ; Govaerts, R. ; Vandewalle, J.

Author_Institution

EAST Lab., Kath. Univ. Leuven, Belgium

fYear

1993

fDate

20-22 Oct 1993

Firstpage

12

Lastpage

20

Abstract

The design of a high-speed cryptographic coprocessor is presented. This coprocessor is named Subterranean and can be used for both cryptographic pseudorandom sequence generation (Substream) and cryptographic hashing (Subhash). In Substream mode the chip can be used for stream encryption/decryption under control of a 256-bit key. A cryptographic resynchronization mechanism is provided for fast accessibility encrypted data by legitimate parties. Application fields include the real-time encryption of digital HDTV signals as well as high speed telecommunication and networking such as ATM. The chip has been fabricated within the INVOMEC/EUROCHIP educational VLSI Design Facilities in MIETEC 2.4μ CMOS technology. Measured samples are operating at encryption/decryption rates of 286 Mbits/sec and hashing rates of 572 Mbits/sec. The operation of the chip is demonstrated by setup showing the real-time encryption and decryption of digitized PAL color composite video signals. The designed cryptographic module can be used as a stand-alone device or embedded as a mega-block in a larger chip

Keywords

CMOS digital integrated circuits; ISDN; application specific integrated circuits; coprocessors; cryptography; digital television; high definition television; integrated circuit design; multimedia communication; telecommunication computing; very high speed integrated circuits; video coding; 18 MHz; 2.4 micron; 286 Mbit/s; 572 Mbit/s; ATM; CMOS; ISDN; Subhash; Substream; Subterranean; VLSI; cryptographic chip; cryptographic hashing; cryptographic module; cryptographic pseudorandom sequence generation; design; digital HDTV signals; digitized PAL color composite video signals; embedded; fast accessibility encrypted data; finite state machine; high speed telecommunication; high-speed cryptographic coprocessor; high-speed multimedia; mega-block; real-time encryption; resynchronization mechanism; stand-alone; stream encryption/decryption; CMOS technology; Coprocessors; Cryptography; Educational technology; HDTV; ISDN; Random sequences; Streaming media; Telecommunication control; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Signal Processing, VI, 1993., [Workshop on]

Conference_Location

Veldhoven

Print_ISBN

0-7803-0996-0

Type

conf

DOI

10.1109/VLSISP.1993.404507

Filename

404507