A partitionable distributed beamformer and signal conditioner architecture

VLSI circuit technology provides at least an order of magnitude increase in signal processing density; this greater processing density and the associated reduction in cost per function has led to larger systems with significant increases in front-end signal conditioning and signal data transfer capability. Increased signal conditioning can be provided by distributed signal processing using both parallel and pipelined operations. Increased signal data transfer requirements can be satisfied using local, nearest-neighbor communication instead of global communication. The combination of parallel processing and parallel signal data paths offers an approach for VLSI signal conditioners with much higher processing throughput and signal bandwidth; this combination of attributes is typical of systolic array processor organizations [1]. An interconnection method and two distributed processing elements, one multi-function programmable and the other single-function programmable, are described.