DocumentCode :
3003726
Title :
OLLAF : A dual plane reconfigurable architecture for OS support
Author :
Garcia, Samuel ; Granado, Bertrand
Author_Institution :
ENSEA, ETIS, Cergy
fYear :
2008
fDate :
20-22 Dec. 2008
Firstpage :
282
Lastpage :
287
Abstract :
In the context of large versatile platform for embedded real time system on chip, a fine grained dynamically reconfigurable architecture could be used as one possible computational resource. In order to manage efficiently this resource we need a specific OS kernel able to manage such a hardware adaptable architecture. Both the history of micro-processor based system and our previous work based on currently available FPGA devices led us to think that not only an OS kernel must be defined to handle an FGDRA but a FGDRA must also be designed to handle this OS kernel. This article relate our original work in this direction. OLLAF, an original FGDRA core that we have designed will be presented. A comparison with other methods used today using commercially available FPGA is also presented concerning the particular preemption service.
Keywords :
field programmable gate arrays; microprocessor chips; system-on-chip; FPGA devices; OS support; dual plane reconfigurable architecture; embedded real time system on chip; hardware adaptable architecture; microprocessor based system; Computer architecture; Embedded computing; Field programmable gate arrays; Hardware; History; Kernel; Real time systems; Reconfigurable architectures; Resource management; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test Workshop, 2008. IDT 2008. 3rd International
Conference_Location :
Monastir
Print_ISBN :
978-1-4244-3479-4
Electronic_ISBN :
978-1-4244-3478-7
Type :
conf
DOI :
10.1109/IDT.2008.4802514
Filename :
4802514
Link To Document :
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