Signed binary delta modulation digital filter

To apply multiple-valued logic (MVL) to digital filter design, a novel structure of digital filter, named signed binary delta modulation digital filter (SBDM-DF), is presented. The SBDM-DF uses a tristate quantizer allowing (1, 0, -1) states to encode the input signal. Signed binary number representation is used for filter coefficients in order to attain carrier-free addition with signed binary adder tree (SBAT). In hardware realization, ternary logic circuits can be adopted to increase the carried information per wire. From the analysis of SNR (signal-to-noise-ratio) characteristics of SBDM and conventional delta modulation (DM), it is found that the sampling frequency of SBDM can be reduced by at least one-half, relative to DM, for the same signal quality. The design procedure of SBDM-DF is illustrated by a typical low-pass filter using the Kaiser-windowing technique