Title :
A complete pipelined parallel CORDIC architecture for motion estimation
Author :
Chen, Jie ; Liu, K. J Ray
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Abstract :
We propose a novel fully-pipelined parallel CORDIC architecture (CORDIC-DXT-ME) employing the DCT Pseudo-Phase Techniques for Motion Estimation. Its low computational complexity, O(N2) as compared with O(N4) of BKM-ME, makes it fascinating in real time applications. In addition, the DCT-based nature enables us to replace all multipliers by CORDICs with simple shift-and-add operations and to incorporate its implementation with the DCT codec design to gain further savings in hardware complexity. The architecture is regular, modular, and has solely local connection and is suitable for MPEG2 compatible video codec design on a dedicated single chip
Keywords :
computational complexity; discrete cosine transforms; motion estimation; parallel architectures; pipeline processing; real-time systems; video codecs; CORDIC-DXT-ME; DCT pseudo-phase techniques; MPEG2 compatible video codec; computational complexity; hardware complexity; motion estimation; pipelined parallel CORDIC architecture; real time applications; shift-and-add operations; solely local connection; Computational complexity; Computer architecture; Discrete cosine transforms; Educational institutions; Hardware; Motion estimation; Systolic arrays; Throughput; Very large scale integration; Video codecs;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.612907