Title :
A 90 MHz 16 Mbit system integrated memory with direct interface to CPU
Author :
Dosaka, Katsumi ; Yamazaki, Akira ; Watanabe, Naoya ; Abe, Hideaki ; Ogawa, Toshiyuki ; Ishihara, Kazunori ; Kumanoya, Masaki
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
This paper describes a system integrated memory with direct interface to CPU which integrates an SRAM, a DRAM and control circuitry including a TAG. This system memory realizes a computer system without glue chips. Thus, this system memory brings a computer system which is low cost, low power and compact size with sufficient performance. The maximum operating frequency is 90 MHz and the operating current at cache hit is 156 mA.
Keywords :
integrated memory circuits; memory architecture; random-access storage; 156 mA; 16 Mbit; 90 MHz; CPU direct interface; DRAM; SRAM; TAG; cache hit; compact size; control circuitry; maximum operating frequency; operating current; system integrated memory; Central Processing Unit; Circuits; Control systems; Costs; Personal digital assistants; Random access memory; Registers; Size control; Technical Activities Guide -TAG; Ultra large scale integration;
Conference_Titel :
VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7800-2599-0
DOI :
10.1109/VLSIC.1995.520668
