• DocumentCode
    3004899
  • Title

    A high performance SRAM based FPGA device

  • Author

    Zlotnick, Fred ; Li, Wanhao ; Butler, Paul ; Shieh, Michael ; Tang, Dandas

  • Author_Institution
    Motorola Semicond. Sector, Mesa, AZ, USA
  • fYear
    1994
  • fDate
    19-23 Sep 1994
  • Firstpage
    470
  • Lastpage
    473
  • Abstract
    This paper considers alternatives to the standard coarse grain architectures that currently exist and contrast with a new fine grain approach. We shall deal only with SEAM based products since structures and delays are very different for SRAM based products compared to anti-fuse devices
  • Keywords
    application specific integrated circuits; field programmable gate arrays; random-access storage; SRAM based FPGA device; fine grain architecture; high performance device; Delay; Field programmable gate arrays; Logic design; Logic devices; Manufacturing processes; Random access memory; Routing; Scattering; Switches; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
  • Conference_Location
    Rochester, NY
  • Print_ISBN
    0-7803-2020-4
  • Type

    conf

  • DOI
    10.1109/ASIC.1994.404517
  • Filename
    404517
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3004899