DocumentCode
3004947
Title
Comprehensive study of soft errors in advanced CMOS circuits with 90/130 nm technology
Author
Tosaka, Y. ; Ehara, H. ; Igeta, M. ; Uemura, T. ; Oka, H. ; Matsuoka, N. ; Hatanaka, K.
Author_Institution
Fujitsu Labs. Ltd., Tokyo, Japan
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
941
Lastpage
944
Abstract
Characteristics of soft errors (SEs) in 90/130 nm CMOS circuits were comprehensively investigated by high energy neutron- and alpha-accelerated tests. Process dependence on SEs in latch circuits due to neutrons and alpha-ray were investigated. Error patterns in multiple-bit SEs in SRAMs and their impacts on ECC design were also discussed.
Keywords
CMOS integrated circuits; SRAM chips; integrated circuit design; integrated circuit testing; 130 nm; 90 nm; CMOS circuits; ECC design; SRAM; alpha ray; alpha-accelerated test; error patterns; latch circuits; neutron-accelerated test; process dependence; soft errors; Atmospheric measurements; Atmospheric modeling; CMOS technology; Circuit testing; Error correction codes; Latches; Neutrons; Nuclear physics; Particle beams; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Print_ISBN
0-7803-8684-1
Type
conf
DOI
10.1109/IEDM.2004.1419339
Filename
1419339
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