GaAs FET characterization in a quasi-monolithic Si environment

Author

Wasige, E. ; Kompa, G. ; van Raay, F. ; Scholz, W. ; Rangelow, I.W. ; Kassing, R. ; Bertram, S. ; Hudek, P.

Author_Institution

FG Hochfrequenztech., Kassel Univ., Germany

Volume

4

fYear

1999

fDate

13-19 June 1999

Firstpage

1889

Abstract

GaAs FET chips are planar embedded in a high resistivity silicon substrate and characterized up to 40 GHz in a coplanar environment. Hybrid interconnects (bonding wires) are replaced by thin film ones (air bridges). Small signal equivalent circuit extraction results confirm the expected low parasitic inductance values. These are reduced by more than 50% of the typical bonding wire interconnects.

Keywords

III-V semiconductors; MESFET integrated circuits; S-parameters; elemental semiconductors; equivalent circuits; field effect MIMIC; field effect MMIC; gallium arsenide; inductance; integrated circuit interconnections; silicon; 1 to 40 GHz; GaAs; GaAs FET characterization; Si; air bridges; bonding wire interconnects; bonding wires; coplanar environment; hybrid interconnects; parasitic inductance values; planar embedding; quasi-monolithic Si environment; small signal equivalent circuit extractio; thin film interconnects; Bonding; Bridge circuits; Conductivity; FETs; Gallium arsenide; Integrated circuit interconnections; Silicon; Substrates; Thin film circuits; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 1999 IEEE MTT-S International

Conference_Location

Anaheim, CA, USA

Print_ISBN

0-7803-5135-5

Type

conf

DOI

10.1109/MWSYM.1999.780342

Filename

780342