Title :
A single chip VLSI architecture for a real time stereo vision processor
Author :
Jutand, Francis ; Maginot, Serge ; Demassieux, Nicolas ; Maitre, Henri
Author_Institution :
ENST, Paris, France
Abstract :
The architecture of a single-chip stereo vision processor is presented. It can carry out in real time a dynamic programming algorithm (or a Viterbi algorithm) to compute for each pixel the distance between two corresponding lines. An on-chip surviving-paths memorization and decoding is also described. A rough evaluation for a 1.2-μm CMOS process provides an area of less than 70 mm2
Keywords :
CMOS integrated circuits; VLSI; computerised picture processing; real-time systems; 1.2 micron; CMOS process; Viterbi algorithm; dynamic programming algorithm; pixel; real time stereo vision processor; single chip VLSI processor; single-chip stereo vision processor; Cameras; Computer architecture; Cost function; Decoding; Dynamic programming; Heuristic algorithms; Pixel; Stereo vision; Very large scale integration; Viterbi algorithm;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on
Conference_Location :
New York, NY
DOI :
10.1109/ICASSP.1988.197009
