Title :
A chip set for real-time 20-MHz DSP
Author :
Ruetz, Peter A. ; Ang, Peng H.
Author_Institution :
LSI Logic Corp., Palo Alto, CA, USA
Abstract :
A set of 1.5-μm (0.9-μm effective channel length) CMOS integrated circuits has been designed, fabricated, and tested which perform real-time 20-MHz digital signal processing (DSP). The set includes an 8-bit, 64-tap transversal filter (MFIR); a 1-bit, 1024-tap transversal filter and template matcher (BFIR); a 12-bit, 64-tap rank-value filter (RVF); and an 8-line 512-pixel variable-length video shift register (VSR). The chip set is fully functional and operates at 20 MHz. All components in the family can be used together or in a stand-alone fashion. To enhance the flexibility of the processors, each has a reconfigurable window to allow both one-dimensional and two-dimensional processing. The window size and/or the data and coefficient precision of the two transversal filters can be increased by using multiple processors without the need for external components
Keywords :
CMOS integrated circuits; computerised signal processing; digital filters; real-time systems; 0.9 micron; 1 bit; 1 processing; 1.5 micron; 1024-tap transversal filter; 12 bit; 20 MHz; 64-tap transversal filter; 8 bit; CMOS integrated circuits; chip set; coefficient precision; data precision; digital signal processing; effective channel length; multiple processors; rank-value filter; real-time processing; template matcher; two-dimensional processing; variable-length video shift register; Circuit testing; Clocks; Digital signal processing chips; Finite impulse response filter; Matched filters; Nonlinear filters; Shape control; Signal design; Signal processing algorithms; Transversal filters;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on
Conference_Location :
New York, NY
DOI :
10.1109/ICASSP.1988.197012
