Monolithic decimation filtering for custom delta-sigma A/D converters

The authors have identified the resolution/decimation tradeoff in practical delta-sigma A/D converters and the add-rate and memory requirements for first-stage decimators, FIR filters can be expressed in a general z-domain structure that scales directly with decimation. A time-domain procedure facilitates computing the effect of practical decimation filters on DSM (delta-sigma modulator) noise, permitting a systematic comparison of electrical performance. Automatically minimized logic networks are an efficient means of realizing compact impulse-response storage to implement these decimators in automatically generated custom IC form