DocumentCode
3005240
Title
Asynchronous processor design for digital signal processing
Author
Meng, T. H Y ; Jacobs, G.M. ; Brodersen, R.W. ; Messerschmitt, D.G.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1988
fDate
11-14 Apr 1988
Firstpage
2013
Abstract
Asynchronous processors, which do not require an external clocking signal, give better performance than comparable synchronous processors in situations for which global synchronization with a high-speed clock becomes a limiting factor to system throughput. Automatic synthesis and the ability to decouple the timing considerations from the design of computational blocks make this approach particularly attractive in reducing design effort when systems become complex. A number of issues relevant to asynchronous programmable processors such as interconnection circuit specifications, circuit design, data flow control, program flow control, feedback and initialization, and I/O interface are discussed
Keywords
computerised signal processing; I/O interface; asynchronous programmable processors; automatic synthesis; circuit design; data flow control; digital signal processing; feedback; initialization; interconnection circuit specifications; program flow control; Automatic control; Circuit synthesis; Clocks; Digital signal processing; Limiting; Process design; Signal design; Signal processing; Synchronization; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on
Conference_Location
New York, NY
ISSN
1520-6149
Type
conf
DOI
10.1109/ICASSP.1988.197022
Filename
197022
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