Title :
A current direction sense technique for multi-port SRAMs
Author :
Izumikawa, M. ; Yamashina, M.
Author_Institution :
Microelectron. Res. Labs., NEC Corp., Kanagawa, Japan
Abstract :
Single-end sense amplifiers which do not require a reference voltage would be most desirable for multi-port SRAMs. This paper describes a current-direction sense circuit which transforms current direction into a logic value. It operates 4 times faster than a CMOS inverter, and with it it is possible to produce single-end 200 MHz 64 Kb SRAMs whose total power consumption is nearly as low as that required for the memory cell currents alone in conventional SRAMs. Also presented is a write bit-line swing control circuit which uses a memory cell replica to reduce bit-line and word-line swing. When this circuit is applied to be used in a 200 MHz 64 Kb SRAM, it is possible to reduce by one-third the power consumption required for bit-line driving and pseudo-read cell current (0.25 /spl mu/m CMOS).
Keywords :
CMOS memory circuits; SRAM chips; VLSI; cellular arrays; memory architecture; multiport networks; 0.25 micron; 200 MHz; 64 Kbit; CMOS; bit-line driving; current direction sense technique; memory cell replica; multi-port SRAMs; power consumption; pseudo-read cell current; total power consumption; write bit-line swing control circuit; Delay effects; Driver circuits; Energy consumption; Impedance; Inverters; Laboratories; Microelectronics; National electric code; Random access memory; Voltage;
Conference_Titel :
VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7800-2599-0
DOI :
10.1109/VLSIC.1995.520670