Crosstalk improvement technology applicable to 0.14μm CMOS image sensor

Author

Tseng, Chien-Hsien ; Wuu, Shou-Gwo ; Chien, Ho-Ching ; Yaung, Dun-Nian ; Hsu, Tze-Hsuan ; Lin, Jeng-Shyan ; Hsu, Hung-Jen ; Yu, Chung-Yi ; Lo, Chin-Hsin ; Wang, Chung S.

Author_Institution

Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

997

Lastpage

1000

Abstract

For pixel crosstalk improvement, modified logic technology with thin epi wafer thickness, thin backend process thickness and air gap guard ring technology, pixel size can be further scaled down to less than 2.8 μm × 2.8 μm and maintain the same performance as 4.0 μm × 4.0 μm pixel does. Greater than 65% crosstalk reduction at 10° incident angle has been demonstrated. This technology can be applicable to CMOS image sensor with 0.14 μm design rules.

Keywords

CMOS image sensors; 0.14 micron; CMOS image sensor; air gap guard ring; backend process thickness; epi wafer thickness; modified logic technology; pixel crosstalk improvement; pixel size reduction; CMOS image sensors; CMOS logic circuits; CMOS process; CMOS technology; Computational Intelligence Society; Crosstalk; Isolation technology; Optical diffraction; Optical filters; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International

Print_ISBN

0-7803-8684-1

Type

conf

DOI

10.1109/IEDM.2004.1419356

Filename

1419356

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3005360