• DocumentCode
    3006500
  • Title

    Evaluating the Network Processor Architecture for Application-Awareness

  • Author

    LakshmiPriya, T.K.S. ; Hari Prasad, V. ; Kannan, D. ; Singaram, L. Karthik ; Madhan, G. ; Sundaram, R. Meenakshi ; Prasad, R.M. ; Parthasarathi, Ranjani

  • Author_Institution
    Dept. of Comput. Sci., Anna Univ., Chennai, India
  • fYear
    2007
  • fDate
    7-12 Jan. 2007
  • Firstpage
    1
  • Lastpage
    9
  • Abstract
    The introduction of deep packet inspection technique has enabled the provision of ´application-specific´ QoS. Application-aware processing is a natural extension of this ´higher layer header examination´ technique. The introduction of multicore, programmable, network processors has largely contributed to this extension. In addition to network-specific services inherently supported by the NP architecture, application-aware services also find a place in the fast path. In this paper, we examine the feasibility and suitability of porting application-aware operations on network processors. We have selected a popular application of content delivery -both text and media, to demonstrate the process of building application awareness in the network, and to critically examine the scalability of the concept. We also propose a generic evaluation methodology for application-awareness on NPs and adopt the same to evaluate the Intel IXP network processor. One of the highlights of this study is the design and evaluation of XML processing on the Intel IXP architecture. The resource utilization for the two case studies indicate that different demanding services can be easily accommodated on the NP, and that the NPs have ´headroom´ to support multiple services.
  • Keywords
    XML; computer architecture; computer networks; microprocessor chips; resource allocation; Intel IXP architecture; XML processing; application-aware operation; application-specific QoS; content delivery; deep packet inspection technique; higher layer header examination technique; network processor architecture; resource utilization; Acceleration; Computer architecture; Computer science; Delay; Educational institutions; Hardware; Inspection; Multicore processing; Resource management; Telecommunication traffic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communication Systems Software and Middleware, 2007. COMSWARE 2007. 2nd International Conference on
  • Conference_Location
    Bangalore
  • Print_ISBN
    1-4244-0613-7
  • Type

    conf

  • DOI
    10.1109/COMSWA.2007.382437
  • Filename
    4268080