A Cluster-Based Reconfigurable Optical Network on Chip Design

With the advances in semiconductor and circuit integrated technologies, the number of IP cores that can be integrated on one chip is becoming larger and larger. The traditional bus interconnection method of System on Chip (SoC) cannot meet the performance requirements of the Multi Processor System on Chip (MPSoC). Network on Chip (NoC) has improved the interconnect performance of IP cores. However, the conventional metallic interconnection constrains NoC to make greater improvement, while the mature of optical device integrated technology makes the trend of applying optical interconnection technology to chip promising. This paper proposes a cluster-based reconfigurable optical network on chip architecture (CRONoC), which uses a high bandwidth optical circuit switching network to transmit the inter-cluster data and an electrical packet switching network to control the optical network and transmit the intra-cluster data. By activating the resonators in the proposed inter-cluster crossbar structure, the topology is reconfigurable. Employing the proposed routing algorithm, the maximum distance of the network is reduced to 3 for the 64 core CRONoC. Finally, the performance of CRONoC in terms of end to end latency and network throughput under different traffic patterns is evaluated with OPNET. The simulation results show that the CRONoC architecture is suitable for the local and collective communications.