DocumentCode :
3006994
Title :
Electrical characteristics of the novel BiCMOS ESD protection circuit with low trigger voltage, low leakage and fast turn-on
Author :
Lee, Byung-Seok ; Jung, Jin-Woo ; Kim, Dong-Su ; Yang, Yil-Suk ; Koo, Yong-Seo
Author_Institution :
Dept. of Electron. & Electr. Eng., Dankook Univ., Yongin, South Korea
fYear :
2011
fDate :
21-24 Nov. 2011
Firstpage :
667
Lastpage :
670
Abstract :
In this paper, electrostatic discharge (ESD) protection circuit with an advanced substrate-triggered NMOS and a gate-substrate triggered NMOS using PNP bipolar transistor are proposed to provide low trigger voltage, low leakage, and fast turn-on speed. The experimental result show that the proposed substrate-trigged NMOS has a low trigger voltage of 5.98V and faster turn-on time(~37ns). The proposed gate-substrate NMOS has a lower trigger voltage of 5.31V and low leakage current of 80pA.
Keywords :
BiCMOS integrated circuits; bipolar transistors; electrostatic discharge; leakage currents; PNP bipolar transistor; advanced substrate-triggered NMOS; current 80 pA; electrical characteristics; electrostatic discharge protection circuit; gate-substrate triggered NMOS; low leakage current; low trigger voltage; novel BiCMOS ESD protection circuit; voltage 5.31 V to 5.98 V; Bipolar transistors; CMOS integrated circuits; Electrostatic discharges; Logic gates; MOS devices; Substrates; Voltage measurement; ESD; gate-substrate triggered technique; substrate triggered technique;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2011 - 2011 IEEE Region 10 Conference
Conference_Location :
Bali
ISSN :
2159-3442
Print_ISBN :
978-1-4577-0256-3
Type :
conf
DOI :
10.1109/TENCON.2011.6129191
Filename :
6129191
Link To Document :
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