DocumentCode
3007076
Title
Current Sensorless Power Factor Correction based on Digital Current Rebuilding
Author
Azcondo, Francisco J. ; De Castro, Angel ; Diaz, F. Javier ; Garcia, Oscar
Author_Institution
ETSIIyT, Univ. de Cantabria, Santander
fYear
2009
fDate
15-19 Feb. 2009
Firstpage
774
Lastpage
779
Abstract
A new digital control technique for power factor correction is presented. The main novelty of the method is that there is no current sensor. Instead, the input current is digitally rebuilt, using the estimated input current for the current loop. Apart from that, the ADCs used for the acquisition of the input and output voltages have been designed ad-hoc. Taking advantage of the slow dynamic behavior of these voltages, almost completely digital ADCs have been designed, leaving only a comparator and an RC filter in the analog part. The final objective is obtaining a low cost digital controller which can be easily integrated in an ASIC along with the controller of paralleled and subsequent power sections.
Keywords
power factor correction; current loop; current sensorless power factor correction; digital control technique; digital current rebuilding; Bandwidth; CMOS technology; Costs; Counting circuits; Current measurement; Digital control; Filters; Power factor correction; Switches; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition, 2009. APEC 2009. Twenty-Fourth Annual IEEE
Conference_Location
Washington, DC
ISSN
1048-2334
Print_ISBN
978-1-4244-2811-3
Electronic_ISBN
1048-2334
Type
conf
DOI
10.1109/APEC.2009.4802749
Filename
4802749
Link To Document