DocumentCode :
3007428
Title :
Bridging the HPC Processor-Memory Gap with Quilt Packaging
Author :
Buckhanan, Wayne L. ; Niemier, Michael ; Bernstein, Gary H.
Author_Institution :
Center for Nano Sci. & Technol., Univ. of Notre Dame, Notre Dame, IN, USA
fYear :
2010
fDate :
June 28 2010-July 1 2010
Firstpage :
1
Lastpage :
3
Abstract :
High performance computing (HPC) systems are constrained in the areas of performance, power, and cooling. A new 2D technology, called "Quilt Packaging," is presented as a possible solution to positively impact the processor-memory connection in these areas. A straw man architecture based on current HPC nodes in the RedStorm system at Sandia National Laboratories is used to explore the effects of Quilt Packaging on the connection between processor and memory.
Keywords :
electronics packaging; 2D technology; HPC processor-memory gap; Red Storm system; high performance computing system; processor-memory connection; quilt packaging; straw man architecture; Circuits; Computer architecture; Costs; High performance computing; Laboratories; Quadratic programming; Semiconductor device packaging; Storms; System-on-a-chip; Tropical cyclones;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Micro/Nano Symposium (UGIM), 2010 18th Biennial University/Government/Industry
Conference_Location :
West Lafayette, IN
ISSN :
0749-6877
Print_ISBN :
978-1-4244-4731-2
Electronic_ISBN :
0749-6877
Type :
conf
DOI :
10.1109/UGIM.2010.5508918
Filename :
5508918
Link To Document :
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