Title :
On choosing the right error models for circuit testing
Author :
Stave, Robert ; Kao, De Yu ; Lin, Ting-Ting Y.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
Abstract :
Error models help to correlate the fault model for a circuit with the error patterns observed at the output. This information is useful in both the design and the evaluation of a test strategy for the circuit. Two widely used error models are the symmetric and the independent model. In this paper, we propose a method to measure how closely a circuit follows each model, thus ensuring better test strategy
Keywords :
combinational circuits; fault diagnosis; integrated circuit testing; least mean squares methods; logic testing; aliasing; circuit testing; combinational circuits; error models; fault model; independent model; mean least squares; symmetric model; test strategy; Circuit faults; Circuit testing; Combinational circuits; Computer errors; Electrical fault detection; Error correction; Fault detection; Least squares methods; Multilevel systems; Process design;
Conference_Titel :
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-2020-4
DOI :
10.1109/ASIC.1994.404534
