Title :
Field transistors electrical behaviour in double level aluminum interconnect processes
Author :
Deleonibus, S. ; Arena, C. ; Heitzmann, U. ; Martin, F. ; Lajzerowicz, J. ; Vinet, F.
Author_Institution :
CEA IRDI DLETI/SMSC, Grenoble, France
Abstract :
Summary form only given. A comparison is made of the behavior of metal 2 gate NMOS field transistors using three types of double-level aluminum interconnect isolation process for submicron CMOS application. The three insulators used are permanent spin-on-glass (SOG) process, partial etchback SOG process, and totally sacrificial SOG. Six-transistor-cell CMOS 16 K SRAMs laid out with 0.8-μm design rules have been processed using the three processes. The total etchback process gives the best results, giving values of Icc 10 times lower than that obtained in the permanent SOG process
Keywords :
CMOS integrated circuits; aluminium; insulated gate field effect transistors; integrated memory circuits; metallisation; random-access storage; 0.8 micron; NMOS field transistors; SRAMs; double level; electrical behaviour; etchback process; interconnect processes; isolation process; partial etchback; permanent spin-on-glass; submicron CMOS application; totally sacrificial; Aluminum; Chemical processes; Degradation; Dry etching; Gas insulation; MOS devices; Silicon compounds; Subthreshold current; Voltage; Wet etching;
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1989. Proceedings., Sixth International IEEE
Conference_Location :
Santa Clara, CA
DOI :
10.1109/VMIC.1989.78060
