DocumentCode :
3008659
Title :
System Level Design of a Digital Audio Class D Power Amplifier
Author :
Feng, Hui ; Yu, Zeqi ; Han, Zhigang ; Feng, Fan
Author_Institution :
VLSI Inst., Tongji Univ., Shanghai, China
fYear :
2010
fDate :
29-31 Oct. 2010
Firstpage :
1
Lastpage :
5
Abstract :
Based on an error correction method for digital audio class D power amplifiers, a digital audio class D power amplifier is designed at system level in this paper. The power amplifier includes a high-performance low-complexity 8× interpolation filter, a 5-bit 8th-order sigma-delta modulator, a digital double-edge PWM generator and a H-bridge power stage, and can correct the error caused by power supply noise in power stage and nonlinearity of digital PWM generator. At last, the digital audio power amplifier is simulated, the simulation results indicate the maximal SNR of the power amplifier is 103 dB, which is enough to suit the need of high-performance audio power amplifier.
Keywords :
audio-frequency amplifiers; digital filters; error correction; power amplifiers; pulse width modulation; sigma-delta modulation; 8th-order sigma-delta modulator; H-bridge power stage; digital audio class D power amplifier; digital double-edge PWM generator; error correction method; high-performance low-complexity interpolation filter; power supply noise; simulation; system level design; word length 5 bit; Frequency modulation; Generators; Noise; Power amplifiers; Power supplies; Pulse width modulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multimedia Technology (ICMT), 2010 International Conference on
Conference_Location :
Ningbo
Print_ISBN :
978-1-4244-7871-2
Type :
conf
DOI :
10.1109/ICMULT.2010.5631340
Filename :
5631340
Link To Document :
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