Title :
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
Author :
Sun, Lizhong ; Lepley, Thieny ; Nozahic, Franck ; Bellissant, Arnaud ; Kwasniewski, Tad ; Heim, Bany
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Abstract :
This paper presents the design consideration of high order digital ΔΣ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (MASH 1-2) is designed and implemented which allows for the input to operate over 75% of the input adder capacity. The number of the output levels is reduced to two bits. The circuit was verified through simulation, ASIC implementation and exhibits high potential for a gigahertz range, low-power monolithic CMOS frequency synthesizer
Keywords :
CMOS integrated circuits; application specific integrated circuits; delta-sigma modulation; frequency synthesizers; ASIC implementation; CMOS frequency synthesizer; digital delta-sigma modulator; fractional-N frequency synthesis; input adder capacity; modulus controller; third-order MASH structure; Bandwidth; Circuits; Delta modulation; Delta-sigma modulation; Filters; Frequency synthesizers; Multi-stage noise shaping; Noise shaping; Phase locked loops; Phase noise;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.780641
