Study of thermal effects on thin double gate SOI MOSFETs characteristics

Author

Gharabagi, Roobik

Author_Institution

Dept. of Electr. Eng., Saint Louis Univ., St. Louis, MO, USA

fYear

2004

fDate

38079

Firstpage

107

Lastpage

111

Abstract

A quasi two dimensional model is developed for a fully depleted (FD) double gate Silicon on Insulator (SOI) Metal Oxide Semiconductor (MOS) Transistors for the strong inversion regime. Front and back gate effects are accounted for. Small geometry effects such as carrier velocity saturation, mobility degradation, and channel length modulation effects are included. Lattice and carriers are considered to be at thermal equilibrium. The thermal effects are included in carrier mobility, threshold voltage, and intrinsic concentration. IN characteristics in the saturation region include the effects of impact ionization current and parasitic bipolar transistor.

Keywords

MOSFET; carrier density; carrier mobility; impact ionisation; inversion layers; semiconductor device models; silicon-on-insulator; temperature distribution; thermal conductivity; I-V characteristics; SOI MOSFET; back gate effects; carrier velocity saturation; channel length modulation; front gate effects; fully depleted double gate; impact ionization current; intrinsic concentration; mobility degradation; parasitic bipolar transistor; quasi two dimensional model; strong inversion regime; thermal effects; thermal equilibrium; threshold voltage; Geometry; Lattices; MOSFETs; Packaging; Silicon on insulator technology; Temperature; Thermal conductivity; Thermal degradation; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Region 5 Conference: Annual Technical and Leadership Workshop, 2004

Print_ISBN

0-7803-8217-X

Type

conf

DOI

10.1109/REG5.2004.1300175

Filename

1300175