DocumentCode
3009336
Title
Techniques for improving the performance of sparse matrix factorization on multiprocessor workstations
Author
Rothberg, Edward ; Gupta, Anoop
Author_Institution
Dept. of Comput. Sci., Stanford Univ., CA, USA
fYear
1990
fDate
12-16 Nov 1990
Firstpage
232
Lastpage
241
Abstract
The problem of factoring large sparse systems of equations on high-performance multiprocessor workstations is investigated. A parallel factorization code is described which utilizes the supernodal structure of the matrix to substantially reduce the number of memory references. The authors also propose enhancements that significantly reduce the overall cache miss rate, resulting in greatly increased factorization performance. Experimental results from executions on the Silicon Graphics 4D/380 multiprocessor are presented. Using eight processors, the parallel supernodal code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as previously used parallel nodal approaches
Keywords
matrix algebra; parallel programming; performance evaluation; 40 MFLOPS; Silicon Graphics 4D/380 multiprocessor; benchmark matrices; cache miss rate; factorization performance; high-performance multiprocessor workstations; large sparse systems; multiprocessor workstations; parallel factorization code; parallel supernodal code; sparse matrix factorization; supernodal structure; Computer science; Costs; Equations; Grain size; Microprocessors; Parallel machines; Silicon; Sparse matrices; Supercomputers; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Supercomputing '90., Proceedings of
Conference_Location
New York, NY
Print_ISBN
0-8186-2056-0
Type
conf
DOI
10.1109/SUPERC.1990.130025
Filename
130025
Link To Document