DocumentCode
3009702
Title
An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V
Author
Sawada, Akuzo ; Sugawara, Yoshikazu ; Masui, Shoichi
Author_Institution
Nippon Steel Corp., Kanagawa, Japan
fYear
1995
fDate
8-10 June 1995
Firstpage
75
Lastpage
76
Abstract
We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.
Keywords
CMOS memory circuits; EPROM; voltage multipliers; 1 to 2 V; 1.2 micron; CMOS EEPROM; CMOS technology; bootstrapped clock generators; high-voltage generator; low-voltage EEPROMs; onchip HV generator circuit; pMOSFET-based charge pump circuit; CMOS technology; Charge pumps; Clocks; Coupling circuits; EPROM; Low voltage; Parasitic capacitance; Power generation; Power supplies; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
0-7800-2599-0
Type
conf
DOI
10.1109/VLSIC.1995.520692
Filename
520692
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