Process and test techniques for known good ASIC die

The 1990´s have seen continued increase in Multichip Module (MCM) design start ups. Not only is an increase being seen in the number of designs, but also, more MCM and ASIC designs are being integrated into singular projects, with ASICs being used in MCMs. This trend is expected to continue, and with ASIC use ever increasing, these parts will statistically have a large impact on the probability of MCM failure due to component failure. The requirement for fully tested ASIC die is one of the leading concerns in MCM design and manufacture. This paper discusses four methods of die mount into temporary packages that allow full electrical parameter and temperature range testing to be performed. For evaluation of each method, an LSI Logic L1A-1498 Semi-Custom design with 541 gates is used. The die size is 4.790 mm by 4.780 mm, and the part may be packaged in a 28 pin, 600 mil DIP