DocumentCode :
3010459
Title :
At-speed verification technique for LRMs and PCBs
Author :
Nagy, James M.
Author_Institution :
Rome Lab., Griffiss AFB, NY, USA
fYear :
1991
fDate :
24-26 Sep 1991
Firstpage :
211
Lastpage :
215
Abstract :
A method is presented to perform at-speed verification and parametric evaluation of an LRM (line replaceable module) by testing the module to verify its form, fit, function, and interface (F31) characteristics. A demonstration of this methodology was conducted, utilizing a VLSI component tester as a display of this capability. The LRM demonstration was conducted on two distinct VLS test systems to verify the portability of using standard data formats and the concept of tester independence. The data format for capturing of the test requirements is the proposed IEEE standard TRSL (Test Requirement Specification Language) and the test vector information used the IEEE standard WAVES (Waveform and Vector Exchange Specification) format
Keywords :
VLSI; automatic testing; military equipment; printed circuit testing; specification languages; standards; IEEE standard; Test Requirement Specification Language; VLSI component tester; Waveform and Vector Exchange Specification; at-speed verification; interface; line replaceable module; parametric evaluation; portability; standard data formats; test vector; Circuit testing; Displays; Laboratories; Logic testing; Military aircraft; Performance evaluation; Printed circuits; Software testing; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON '91. IEEE Systems Readiness Technology Conference. Improving Systems Effectiveness in the Changing Environment of the '90s, Conference Record.
Conference_Location :
Anaheim, CA
Print_ISBN :
0-87942-576-8
Type :
conf
DOI :
10.1109/AUTEST.1991.197548
Filename :
197548
Link To Document :
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