Title :
A 2.5-Gb/sec 15-mW BiCMOS clock recovery circuit
Author :
Raeavi, B. ; Sung, J.
Author_Institution :
AT&T Bell Labs., Holmdel, NJ, USA
Abstract :
High-speed low-power clock recovery circuits find wide application in high-performance communication systems. This paper describes the design of a 2.5-Gb/sec 15-mW clock recovery circuit (CRC) fabricated in a 20-GHz 1-/spl mu/m BiCMOS technology. Employing a modified version of the "quadricorrelator" architecture, the circuit extracts the clock from a non-return-to-zero (NRZ) data sequence using both phase and frequency detection.
Keywords :
BiCMOS digital integrated circuits; clocks; 1 micron; 15 mW; 2.5 Gbit/s; 20 GHz; BiCMOS technology; NRZ data sequence; communication systems; frequency detection; high-speed low-power clock recovery circuit; phase detection; quadricorrelator architecture; BiCMOS integrated circuits; Circuit noise; Clocks; Cyclic redundancy check; Frequency locked loops; Low pass filters; Optical signal processing; Ring oscillators; Tail; Voltage-controlled oscillators;
Conference_Titel :
VLSI Circuits, 1995. Digest of Technical Papers., 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7800-2599-0
DOI :
10.1109/VLSIC.1995.520696
