DocumentCode :
3010970
Title :
Realtime video signal processor module
Author :
Harasaki, H. ; Tamitani, I. ; Endo, Y. ; Nishitani, T. ; Yamashina, M. ; Enomoto, T. ; Suzuki, N.
Author_Institution :
NEC Corporation, Kawasaki, Japan
Volume :
12
fYear :
1987
fDate :
31868
Firstpage :
1961
Lastpage :
1964
Abstract :
Two important functional LSIs for the realtime Video Signal Processor (VSP) have been developed. One is the Pipelined Arithmetic Unit (PAU) and the other is the Address Generation Unit (AGU). The PAU chip employs a flexible pipelined architecture optimized for L1 or L2-norm distance calculation, used in a wide variety of image processing. The AGU chip, including 15-word register file for pointer alteration, offers a user-friendly two dimensional pointer addressing. A realtime Video Signal Processor Module (VSPM), composed of one PAU, four AGUs and memories, has been implemented for multiprocessor VSP configuration. Thanks to software control capability, various kinds of picture coding techniques can be evaluated by the system.
Keywords :
Arithmetic; Computer architecture; Control systems; Image coding; Image processing; Laboratories; Registers; Signal processing; Signal processing algorithms; Software algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type :
conf
DOI :
10.1109/ICASSP.1987.1169334
Filename :
1169334
Link To Document :
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