DocumentCode :
3011436
Title :
Hardware-software co-simulation of a parallel computer system
Author :
Shome, T. ; McLeod, R.D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
fYear :
1997
fDate :
22-23 May 1997
Firstpage :
214
Lastpage :
217
Abstract :
In this paper the hardware/software co-simulation results (Gajski et al., 1992) of a four node single-bus based multicomputer architecture are presented. The application used to illustrate the co-simulation is a parallel matrix multiplication algorithm. The objective is to illustrate the trade-offs and improvements in design that can be made within a co-simulation environment
Keywords :
high level synthesis; mathematics computing; matrix multiplication; parallel algorithms; parallel architectures; parallel machines; software engineering; virtual machines; design; four node single-bus based multicomputer; hardware-software co-simulation; multicomputer architecture; parallel computer; parallel matrix multiplication algorithm; Application software; Computer architecture; Concurrent computing; Delay; Hardware design languages; Kernel; Master-slave; Parallel machines; Software libraries; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
WESCANEX 97: Communications, Power and Computing. Conference Proceedings., IEEE
Conference_Location :
Winnipeg, Man.
Print_ISBN :
0-7803-4147-3
Type :
conf
DOI :
10.1109/WESCAN.1997.627141
Filename :
627141
Link To Document :
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